Substrate influence on the behavior of capacitance hysteresis of III-V bilayered MOS stacks

Fernando L. Aguirre, Sebastián M. Pazos, Felix Palumbo, Igor Krylov, Moshe Eizenberg

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

The dependence of ΔVHys on the stressing voltage for High-k Bi-layered InGaAs and InP substrate MOS capacitors is discussed in this work. Using different proportions of Al2O3 and HfO2 dielectrics on a 10 nm thick gate insulator, the influence of each layer and its defects on the variations of the flat-band and hysteresis voltage is studied. Results show that increasing the thickness of the Al2O3 interfacial layer improves the quality of the structure in terms of reducing the hysteresis. InP stacks show the same tendencies of InGaAs stacks, but with a negligible impact of the stress in inversion on the hysteresis.

Original languageEnglish
Title of host publicationSBMicro 2017 - 32nd Symposium on Microelectronics Technology and Devices
Subtitle of host publicationChip on the Sands, co-located Symposia: 30th SBCCI - Circuits and Systems Design, 2nd INSCIT - Electronic Instrumentation, 7th WCAS - IC Design Cases and 17th SForum - Undergraduate-Student Forum
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781538628775
DOIs
StatePublished - 15 Nov 2017
Externally publishedYes
Event32nd Symposium on Microelectronics Technology and Devices: Chip on the Sands, SBMicro 2017 - Fortaleza, Ceara, Brazil
Duration: 28 Aug 20171 Sep 2017

Publication series

NameSBMicro 2017 - 32nd Symposium on Microelectronics Technology and Devices: Chip on the Sands, co-located Symposia: 30th SBCCI - Circuits and Systems Design, 2nd INSCIT - Electronic Instrumentation, 7th WCAS - IC Design Cases and 17th SForum - Undergraduate-Student Forum

Conference

Conference32nd Symposium on Microelectronics Technology and Devices: Chip on the Sands, SBMicro 2017
CountryBrazil
CityFortaleza, Ceara
Period28/08/171/09/17

Keywords

  • HfO
  • InGaAs
  • InP
  • bi-layer MOS
  • hysteresis

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